Beginning with z13 processors and continuing with z14s, customer experiences have confirmed that delivered capacity is more dependent than ever before on effective utilization of processor cache. This session covers how to interpret the SMF 113 metrics to optimize your environment and reduce CPU consumption and MLC software expense, and reflects findings from analyzing detailed processor cache data from 50 sites.
Details on z14 cache design changes will be presented and assessed using metrics from a z14 migration case study.
Insights into the potential impact of various tuning actions will be brought to life with data from numerous real-life case studies. This session builds upon a related user experience presentation that was selected for the 2016 “SHARE Best Session” award and 2017 “CMG Best Paper Award,” but has been significantly expanded with knowledge and experiences gained from reviewing data from dozens of sites.
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